CODINGROM ★ A Guide to EPROMs on the CPC with Ian Neill - Part. 2 ★

A Guide to EPROMs on the CPC (2/4)
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In this article I will cover (briefly) the different sorts of EPROMs you can get, and if hat sorts can be used with the CPC. I will also explain the mechanism behind how they are actually programed, and then, in as much detail as I can, how they are interfaced to the CPC.

INTRO

Hopefully you are now fully armed with what I suggested in Part One.

WHAT'S AN EPROM

EPROM stands for Erasable Programable Read Only Memory. It is like a ROM because it retains is contents even when it has no power supply. Unlike a ROM, it is possible to change an EPROMs contents, but don't compare this ability to that of RAM, as the method of programming is completely different!

WHAT TYPE IS IT

There are dozens of different kinds of EPROM. The following list will give you an idea of what differences exist, even between similar looking devices:

a) The nanufacturer - lots of companies make EPROMs (and they all give then different codes).

b) The physical size and shape of the chip - not all EPROMs have the same number of legs.

c) The capacity - not all EPROMs can contain the same amount of information.

d) The word size - EPROMs don't always have a byte at every address.

e) The access tine - some EPROMs are faster than others (measured in nanoseconds - ns).

f) The programing method - low / high volts, long / short pulse? This is discussed later.

g) The erasing method - usually ultra violet light, but a certain flavour of EPROM (called EEPROM) can be erased electrically!

Pick an EPROM, but not any EPROM!
NMThe manufacturer ID. NM = National Semiconductor, I = Intel, MC = Motorola, SG = SGS Thompson (and so on..)
27The EPROM family "27" is the family with an 8 bit (a byte!) word size.
CC for CMOS. Indicates if the EPROM is CMOS and uses less power, but can be damaged by static!
128The EPROM capacity in Kbits. For the 27 family divide by 8 to get the capacity in Kbytes. 64 : 8kBytes, 128 = 16Kbytes, 256 = 32Kbytes.
QGenerally indicates (to the manufacturer?) the type of programing algorithm to be used.
200Refers to the access time in ns. This is sometimes separated by a and is often quoted without the last "0" (which can lead to confusion!)

FAQ

Considering the above list, it is not suprising that one of the most coneon questions I get is simply "What type of EPROM do I need?". This is often followed by "If I send yon the money, can you get it for me?".

The capacity and word size decide now »any address lines and data lines the EPROM has. Here are some examples to explain:

EXAMPLE ONE

A 64Kbit (65536 bits) by 1 EPROM will have 16 address lines (2^16 = 65536) and 1 data line for the 1 bit stored at each address.

EXAMPLE TWO

A 64Kbit (65536 bits) by 8 EPROM will have 13 address lines (2^13 = 8192) and 8 data lines for the 8 bits stored at each address.

What you need for the CPC is an 8, 16, or 32K by 8 EPROM that has an access time of 250ns (or faster). Depending on which of these EPROMs you have, you will be able to store 8, 16, or 32Kbytes of data, but the? will all have 28 legs and fit. in the sane size of socket, Note that if you use a 32Kbyte EPROM in an ordinary ROMBOX you will still only be able to use 16Kbytes of it ( the top half) because 1 of the address lines (A14) is held permanently high.

A TABLE IS NEEDED

Unfortunately the markings on an EPROM can appear cryptic so the table below shows how to decode them.

Sometimes the EPROM will have "12.5V" or "21V" printed on it. This indicates the programing voltage that should be used when programing the EPROM.

HOW EPROMS ARE PROGRAMED

With an EPROM programmer of course!

This is a device that is over complicated for no reason - I will explain how an EPROM is programmed.....

Look at the 27128 EPROM pin-out shown in figure 1 below:

  • A0 - A13 : The address lines (16384 bytes - 2^14).
  • D0 - D7 : The data lines.
  • Vcc : The 5V supply line.
  • GND : The Ground supply line.
  • /CE : Chip Enable (active low "0" means enabled).
  • /OE : Output Enable (active low "0" means enabled).
  • Vpp : The Programming Voltage supply line.
  • /PGM : The Programming Pulse line.

To program this chip an algorithm like this would be used:

a) Set up chip supplies Vcc and GND -see note 1.

b) Set up Programming Voltage Vpp -see note 2.

c) Enable chip - /CE set low.

d) Disable chip Output - /OE set high

e) Set up address to be programmed on A0 - A13.

f) Set up value to be programmed on D0 - D7 - see note 3.

g) Apply programming Pulse to /PGM -see note 4.

h) Go back to step e for every byte to be programmed.

NOTES:

1) Normally the supply is 5V, but during programing some chips like to have 6V.

2) Very chip dependant! Can be 12.5V, 21/25V. Generally only older chips use the higher voltage, and of those only the 2716 needs 25V. If you do not know what the programing voltage is, try the low one first!

3) An unprogrammed byte has a value of &FF. It is only possible to program a bit to go from "1" to "0". Once a bit is "0" it must be erased back to "1".

4) The duration and polarity of the pulse is important. Usually they are negative going, except for the 2716 when they Bust be positive going. The duration can be either 1ns or 40ns. Newer chips tend to use the short pulse, which means you can program a new 27C128 in under 20 seconds. An older 27C128, that needs a 40ns pulse, would take over 10 minutes to program. Some chips also require an additional programming pulse (usually of short duration) some time after the main pulse. If you do not know what pulse duration to use try the short one first.

The main complication of EPROM programmers is that they have to handle EPROMs that do not have the same number of legs, therefore, it has to have some sort of signal routeing logic to ensure that the right signal arrives at the correct leg.

Modern EPROM programmers are usually micro-computers in their own right, and have software that can cope with all the different types of EPROM. They will automatically select the correct programing voltage and program pulse duration etc., assuming that they have been correctly told the type of EPROM they have to program! Sore really clever EPROM programmers can even automatically identify the type of EPROM they have by reading the manufacturer's own pre-programed identification value.

HOW ARE EPROMS ERASED

Ultra-violet light! This is the stuff that causes sunburn and skin-cancer etc. But to erase an EPROM you need more than what even the Sun provides on a good day. That doesn't mean that the Sun can't erase EPRONs - given enough time it will

An EPROM eraser is simply an ultraviolet light source operated via a timer switch. They usually have a tray which you put EPROMs onto and then slide under the UV light. Most will have a micro-switch that de-powers the UV light when the tray is out.

The UV light enters the EPROM via the little glass window on the top. Covering this, with a label for example, will prevent the EPROM being erased (assuming the the label is not transparent to UV light!)

In a typical EPROM eraser, an EPROM will be completely erased in about 15 to 20 minutes. However I have found that most EPROMs are wiped clean in about 12 minutes. What affects the time is how close the EPROM is to the UV light, and how clean its window is (beware of the sticky stuff from an old label!)

INTERFACING EPROMS TO THE CPC

As can be seen in Figure 2, EPROMs are "paged" in over the last 16K (address range &C000 to &FFFF) of the CPC's main memory. The BASIC ROM also sits here. EPROMs in this region (where the screen memory usually lives) are called "UPPER ROMs", as opposed to "LOWER ROMs" (eg. the FIRMWARE ROM) which are "paged" in over the first 16K (address range 40000 to &3fff) of the CPC main memory. When a ROM is paged in (either upper or lower), all subsequent memory reads will read the contents of the ROM, but all memory writes will still go to the RAH that is "under" the ROM.

Note that ROM "bank switching" is totally separate from RAM "bank switching", which, incidentally, usually occurs in the second 16K (address range &4000 to &7FFF) of the CPC's main memory.

ACCESS TIME

The CPC can access up to 252 Expansion EPROMs, but in practice about 16 (positions 0 to 15) is the limit. This is because ROM boxes usually only allow a maximum of 8 EPROMs, and more than two boxes places a strain on the CPC power supply. This 16 maximum is further restricted to 14, because BASIC lust live in position 0 (so that the machine will power up into BASIC), and AMSDOS lives at position 7. Also, having two ROMs responding to the same position number, at the same time, usually results in a crash!

Accessing expansion EPROMs is not difficult. The desired ROM position number is sent to the ROM board on I/O address &DFXX (this is any I/O address in the range &DF00 to &DFFF). Until a different number is sent, the selected EPROM will respond to all subsequent expansion RON reads. What actually happens is that the ROM board "latches" the number written to port &DFXX, then when the /ROMEN signal from the CPC (the ROM read request line) goes low, the ROM board will enable the correct EPROM, which will output its data to the CPC. At the sane tine the ROM board generates a ROMDIS signal which goes back to the CPC to disable the internal (BASIC) ROM. If ROMDIS is not activated, the internal (BASIC) ROM will respond to every expansion ROM read. This would obviously cause problems (data bus clashes) if an external EPROM were to be responding also.

ROUND THE CIRCUIT

Figure 3 shows a simple circuit diagram of a ROM board. Notice that because of the way that the CPC uses the I/O space (this is partial address decoding), it is only necessary to detect address line A13 going low to know that the address is &DF00. This circuit then uses the /RONEK signal and address line A15 to detect an upper ROM read, before enabling the correct EPROM and activating the ROMDIS signal. The diode in the ROMDIS signal path is very important as it allows the ROMDIS line to be controlled by other devices when the ROM board is not using it. Also included in this circuit is an optional inverter for data line D3. This is how it is possible to Bake the ROM box configurable between ROM positions 0 - 7 and 8 - 15.

AND FINALLY... MAYBE...

One last thing. The I/O address range, where &DFXX lives, is separate from the main memory address range -essentially it gives the Z80 processor access to another 64K addresses, allowing for interfacing to peripherals and a full 64K of RAM too!

THE END IS NEAR

How for the bit I "cut & pasted" from last issue and you can find it over the page...

If you want to contact me ... Ian Neill

Warwickshire CV33 9SE

My telephone Ho is: (01926) 3


WHAT'S NEXT

Next issue I will discuss the software aspects of EPROMs. I will talk about, and have examples of, the software needed to access them. I will also talk about the software that actually goes in an EPROM.

An example program, with full listings, that can copy EPROM inages onto disc, will be discussed, and I will explain how I put the DOSCOPY program onto EPROM.

Ian, WACCI #101

★ AUTHOR: Ian Neill

Page précédente : A Guide to EPROMs on the CPC (1/4)

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L'Amstrad CPC est une machine 8 bits à base d'un Z80 à 4MHz. Le premier de la gamme fut le CPC 464 en 1984, équipé d'un lecteur de cassettes intégré il se plaçait en concurrent  du Commodore C64 beaucoup plus compliqué à utiliser et plus cher. Ce fut un réel succès et sorti cette même années le CPC 664 équipé d'un lecteur de disquettes trois pouces intégré. Sa vie fut de courte durée puisqu'en 1985 il fut remplacé par le CPC 6128 qui était plus compact, plus soigné et surtout qui avait 128Ko de RAM au lieu de 64Ko.