00001
00002
00003
00004
00005
00006
00007
00008
00009
00010 #ifndef __RAZE_H_INCLUDED__
00011 #define __RAZE_H_INCLUDED__
00012
00013 #include "types.h"
00014
00015 #ifdef __cplusplus
00016 extern "C" {
00017 #endif
00018
00019
00020
00021 #define Z80_MAP_DIRECT 0
00022 #define Z80_MAP_HANDLED 1
00023
00024
00025 typedef enum {
00026 Z80_REG_AF=0,
00027 Z80_REG_BC,
00028 Z80_REG_DE,
00029 Z80_REG_HL,
00030 Z80_REG_IX,
00031 Z80_REG_IY,
00032 Z80_REG_PC,
00033 Z80_REG_SP,
00034 Z80_REG_AF2,
00035 Z80_REG_BC2,
00036 Z80_REG_DE2,
00037 Z80_REG_HL2,
00038 Z80_REG_IFF1,
00039 Z80_REG_IFF2,
00040 Z80_REG_IR,
00041 Z80_REG_IM,
00042 Z80_REG_IRQVector,
00043 Z80_REG_IRQLine,
00044 Z80_REG_Halted
00045 } z80_register;
00046
00047
00048 void z80_reset(void);
00049 int z80_emulate(int cycles);
00050 void z80_raise_IRQ(UBYTE vector);
00051 void z80_lower_IRQ(void);
00052 void z80_cause_NMI(void);
00053
00054
00055 int z80_get_context_size(void);
00056 void z80_set_context(void *context);
00057 void z80_get_context(void *context);
00058 UWORD z80_get_reg(z80_register reg);
00059 void z80_set_reg(z80_register reg, UWORD value);
00060
00061
00062 int z80_get_cycles_elapsed(void);
00063 void z80_stop_emulating(void);
00064 void z80_skip_idle(void);
00065 void z80_do_wait_states(int n);
00066
00067
00068 void z80_init_memmap(void);
00069 void z80_map_fetch(UWORD start, UWORD end, UBYTE *memory);
00070 void z80_map_read(UWORD start, UWORD end, UBYTE *memory);
00071 void z80_map_write(UWORD start, UWORD end, UBYTE *memory);
00072 void z80_add_read(UWORD start, UWORD end, int method, void *data);
00073 void z80_add_write(UWORD start, UWORD end, int method, void *data);
00074 void z80_set_in(UBYTE (*handler)(UWORD port));
00075 void z80_set_out(void (*handler)(UWORD port, UBYTE value));
00076 void z80_set_reti(void (*handler)(void));
00077 void z80_set_av(void (*handler)(void));
00078 void z80_set_fetch_callback(void (*handler)(UWORD pc));
00079 void z80_end_memmap(void);
00080
00081 #ifdef __cplusplus
00082 };
00083 #endif
00084
00085 class Raze
00086 {
00087
00088 public:
00089 Raze() {mIntPending=0;}
00090 ~Raze() {}
00091
00092 typedef UBYTE (*Z80_IN_Handler) (REGPAIR port);
00093 typedef void (*Z80_OUT_Handler)(REGPAIR port, UBYTE value);
00094
00095 void setInHandler (Z80_IN_Handler handler) {}
00096 void setOutHandler(Z80_OUT_Handler handler) {}
00097
00098 void init() {mLastCyclecount=0; mCycleCountInit=0;}
00099
00100 void initMemMap() {z80_init_memmap();}
00101 void endMemMap() {z80_end_memmap(); z80_reset();}
00102
00103 void setMembank_read (UBYTE bank, UBYTE* ptr)
00104 {
00105 if (bank==0) {z80_map_read(0x0000, 0x3fff, ptr); z80_map_fetch(0x0000, 0x3fff, ptr); return;}
00106 if (bank==1) {z80_map_read(0x4000, 0x7fff, ptr); z80_map_fetch(0x4000, 0x7fff, ptr); return;}
00107 if (bank==2) {z80_map_read(0x8000, 0xbfff, ptr); z80_map_fetch(0x8000, 0xbfff, ptr); return;}
00108 if (bank==3) {z80_map_read(0xc000, 0xffff, ptr); z80_map_fetch(0xc000, 0xffff, ptr); return;}
00109 }
00110 void setMembank_write(UBYTE bank, UBYTE* ptr)
00111 {
00112 if (bank==0) {z80_map_write(0x0000, 0x3fff, ptr); return;}
00113 if (bank==1) {z80_map_write(0x4000, 0x7fff, ptr); return;}
00114 if (bank==2) {z80_map_write(0x8000, 0xbfff, ptr); return;}
00115 if (bank==3) {z80_map_write(0xc000, 0xffff, ptr); return;}
00116 }
00117
00118 int cyclecount() {int i=mLastCyclecount; mLastCyclecount=z80_get_cycles_elapsed(); return mLastCyclecount-i;}
00119 void setIntPending(UBYTE ip) {if (ip) {z80_raise_IRQ(0xff); z80_lower_IRQ();}}
00120 UBYTE intPending() {return mIntPending;}
00121
00122 void setInHandler (UBYTE (*handler)(UWORD port)) {z80_set_in(handler);}
00123 void setOutHandler(void (*handler)(UWORD port, UBYTE value)) {z80_set_out(handler);}
00124 void setWsHandler (void (*handler)(void)) {z80_set_av(handler);}
00125
00126 int execute(int i) {mLastCyclecount=0; mCycleCountInit=i; return z80_emulate(i);}
00127 void stop() {z80_stop_emulating();}
00128
00129 private:
00130
00131
00132
00133
00134
00135 int mLastCyclecount;
00136 int mCycleCountInit;
00137 UBYTE mIntPending;
00138
00139 };
00140
00141
00142 #endif
00143