CODINGDDI-1 Firmware: The Complete CPC 464 DISC Operating System ROM Specification

DDI-1 Firmware: Chapter 5.0 Hardware
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Chapter 5 - Hardware

This chapter describes the disc interface in the DDI-1 with some remarks on using other drives and gives details of the recommended hardware configuration for the serial interface.

Note that the serial interface is not supplied with the DDI-1.

5.1 Disc Interface

Floppy Disc Controller

The controller uses a NEC type µPD765A Floppy Disc Controller IC to connect to the disc drives. Only two disc drives are supported, since the US1 line from the µPD765A is ignored. This results in the two disc drives being accessed as drives 0 and 1 and again as 2 and 3. The controller supports both single and double sided and single and double density mini-floppy disc drives. Note that the clock frequency supplied to the µPD765A CLK pin is 4.00 MHz rather than the 8 MHz used with larger disc drives.

The full facilities described in the NEC data sheet for the µPD765A are available, with the exception of interrupts and DMA which are not supported.

The disc interface uses the Z80 I/O ports as follows:

PortOutputInput
#FA7EMotor Control** not used **
#FB7E** not used **µPD765A Status Register
#FB7FPD765A Data RegisterµPD765A Data Register

Expansion ROM

The disc expansion ROM is on the interface board. The ROM is normally number #07, but may be set to number #00 by cutting option trace LK1. This board will ground the expansion bus EXP signal (pin 48) if the ROM number is #07 in order that this address can be avoided by other expansion peripherals. A 200 nanosecond 27128 type EPROM or ROM is normally used, and may be fitted in a DIL socket on the board.

Option traces LK2 and LK3 are manufacturing options for write pre-compensation. They should not need alteration by the user.

Motor Control

Writing to this channel starts and stops the disc drive motors. Writing #00 will stop the motors, #01 will start the motors. On power-up and other system resets the motors are not stopped.

Connector Type

The connector within this unit is a straight 34 way PCB mounting flat cable connector.

Electrical Levels

All electrical levels on the controller are TTL compatable. Signals originating in the drives are terminated by 680 ohm resistors to +5v at the controller and received with gates with input hysteresis. The maximum permissible cable length is 0.75 metre.

Pin Arrangement

All odd-numbered pins are ground. All signals are active low.

Pin No.Signal
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
+5v
+5v
+5v
Index
Drive Select 0
Drive Select 1
+5v
Motor On
Direction Select
Step
Write Data
Write Gate
Track 0
Write Protect
Read Data
Side 1 Select
Ready

Using Other Disc Drives

It is possible to use other disc drives with the DDI-1, in particular 5¼ inch drives. Some hardware knowledge will be required. The following gives some advice and information which should assist in using a different drive.

  • If drive A: the 5V power should be supplied to pins 2,4,6 and 14 of the 5¼ inch drive after ensuring that any existing connections to the drive circuitry have been removed.
  • If Drive B: no terminating resistor should be installed.
  • The drive must have a 'ready' signal on pin 34.
  • The drive will require its own power supply.

The extra cabling should be as short as possible and should consist of a cable-mounting male connector (to mate with the female socket connector on the cable from the interface), all 34 conductors and, normally, a 34 way double-sided card edge connector (to mate with the 5¼ inch drive).

The step rate, motor on and off timeout may have to be changed, see the SETUP utility.

A drive such as the Shugart 201 is not suitable since it does not have a ready signal, but one such as the Chinon F 051 -MD is suitable.

5.2 Serial Interface

The BIOS supports a two channel asynchronous serial interface. However, such an interface is not part of the DDI-1. This describes the ‘Recommended Hardware Configuration' for the serial interface such that, if fitted, it can be driven by the BIOS.

The interface consists of a Zilog Z80A SIO/O or Z80A DART together with an Intel 8253 programmable interval timer. The 8253 is used as a baud rate generator as follows:

Timer 0 generates the transmit clock for channel A of the SIO.

Timer 1 generates the receive clock for channel A of the SIO.

Timer 2 generates both the transmit and receive clocks for channel B of the SIO.

It is assumed that the CLK inputs to all three channels of this device are driven by a 2.0 (± 0.1%) MHz clock signal derived from the 4.0 MHz CPU clock. The GATE inputs to all three channels are tied permanently high.

The I/O ports are used as follows:

PortOutputInput

#FADC
#FADD
#FADE
#FADF
#FBDC
#FBDD
#FBDE
#FBDF

SIO channel A data
SIO channel A control
SIO channel B data
SIO channel B control
8253 load counter 0
8253 load counter 1
8253 load counter 2
8253 write mode word
SIO channel A data
SIO channel A control
SIO channel B data
SIO channel B control
8253 read counter 0
8253 read counter 1
8253 read counter 2
** not used **

★ AUTHOR: Paul OVERELL
★ NOTE: RÉF SOFT158A

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L'Amstrad CPC est une machine 8 bits à base d'un Z80 à 4MHz. Le premier de la gamme fut le CPC 464 en 1984, équipé d'un lecteur de cassettes intégré il se plaçait en concurrent  du Commodore C64 beaucoup plus compliqué à utiliser et plus cher. Ce fut un réel succès et sorti cette même années le CPC 664 équipé d'un lecteur de disquettes trois pouces intégré. Sa vie fut de courte durée puisqu'en 1985 il fut remplacé par le CPC 6128 qui était plus compact, plus soigné et surtout qui avait 128Ko de RAM au lieu de 64Ko.